1. Field of the Invention
The present invention relates to an input amplifier circuit used for a portable telephone or the like, and more particularly to an input amplifier circuit using a CMOSFET.
2. Description of the Related Art
In FIG. 1, there is shown a conventional input amplifier circuit of this kind. As shown in FIG. 1, a signal source 15 is connected to an input terminal IN1 via a capacitor C1 and the input terminal IN1 is coupled with one input terminal of a NAND circuit 12 which constitutes a part of the input amplifier circuit 11. An enable terminal IN2 is coupled with another input terminal of the NAND circuit 12. An output terminal of the NAND circuit 12 is connected to an output terminal OUT and one input terminal of the NAND circuit 12 via a switch circuit 18 which is constituted by an N-channel MOS transistor M8 and a P-channel MOS transistor M4. Also, a P-channel MOS transistor MS1 is connected between a DC power source VDD and one input terminal of the NAND circuit 12 and an N-channel MOS transistor M52 is connected between one input terminal of the NAND circuit 12 and ground.
In this input amplifier circuit, as described above, one input terminal of the NAND circuit 12 whose output is fed back from its output terminal to its one input terminal via the switch circuit 18 is connected to the input terminal IN1 and another input terminal of the NAND circuit 12 is coupled with the enable terminal IN2. In this case, by a control signal such as an enable signal EN input to the enable terminal IN2, the input amplifier circuit 11 can be switched from an operating state to an unoperating state.
Further, both the P-channel MOS transistor MS1 and the N-channel MOS transistor M52 are used in off state, and by designing the sizes of the P-channel MOS transistor MS1 and the N-channel MOS transistor M52 to be large, the NAND circuit 12 can be protected from static electricity.
In order to make the input amplifier circuit 11 to assumes the operating state, an enable signal EN of a high level is applied to the enable terminal IN2. At this time, in the input amplifier circuit 11, a self-bias is given to the input terminal IN1 by the N-channel MOS transistor M3 and the P-channel MOS transistor M4 and an input signal is applied from the signal source 15 to this self-bias point via the capacitor C1. Hence, an amplified input signal is taken out from the output terminal of the NAND circuit 12, that is, the output terminal OUT of the input amplifier circuit 11.
On the other hand, when the enable signal EN is a low level, the output of the NAND circuit 12 is forced to be a high level and thus the input amplifier circuit 11 assumes the unoperating state.
In the conventional input amplifier circuit described above, when it is in the unoperating state by applying the enable signal EN of the low level to the enable terminal IN2, the input terminal IN1 is a high level. When the input amplifier circuit 11 is changed from the unoperating state to the operating state by changing the enable signal EN to the high level, the self-bias is given from the output terminal of the NAND circuit 12 to the input terminal IN1 via a resistance part of the switch circuit 13 and the voltage is finally stabilized at near a middle point.
However, in order to stabilize the voltage near the middle point on the input terminal IN1 to operate as the input amplifier circuit, a time constant decided by a coupling capacitor due to the resistance part of the switch circuit 13 and the capacitor C1 affects and hence it takes a certain time until the input amplifier circuit 11 becomes the operating state, as shown in FIG. 2. In FIG. 2, T1 represents a rise time and T2 represents an operating period as an input amplifier circuit. Also, in FIG. 2, to indicates a timing for switching the enable signal EN from the low level to the high level.
Therefore, in case of an intermittent use or the like of the input amplifier circuit 11, it is necessary to raise the enable signal EN on the enable terminal IN2 from a fairly early time thus resulting in a significant increase in the power consumed.
Accordingly, in order to reduce the time for making the input amplifier circuit 11 assume the operating state, it is considered to reduce the resistance part of the switch circuit 13. However, in this case, on the contrary, a gain as the input amplifier circuit lowers and a stable operation can not be obtained.